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  ? semiconductor components industries, llc, 2011 october, 2011 ? rev. 5 1 publication order number: nts4001n/d nts4001n, nvs4001n small signal mosfet 30 v, 270 ma, single n ? channel, sc ? 70 features ? low gate charge for fast switching ? small footprint ? 30% smaller than tsop ? 6 ? esd protected gate ? aec ? q101 qualified and ppap capable ? nvs4001n ? these devices are pb ? free and are rohs compliant applications ? low side load switch ? li ? ion battery supplied devices ? cell phones, pdas, dsc ? buck converters ? level shifts maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value units drain ? to ? source voltage v dss 30 v gate ? to ? source voltage v gs 20 v continuous drain current (note 1) steady state t a = 25 c i d 270 ma t a = 85 c 200 power dissipation (note 1) steady state t a = 25 c p d 330 mw pulsed drain current t =10  s i dm 800 ma operating junction and storage temperature t j , t stg ? 55 to 150 c source current (body diode) i s 270 ma lead temperature for soldering purposes (1/8? from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface mounted on fr4 board using 1 in sq. pad size (cu area = 1.127 in sq. [1 oz] including traces). device package shipping ? ordering information (top view) sc ? 70 / sot ? 323 case 419 style 8 marking diagram & pin assignment 2 1 http://onsemi.com td = device code m = date code*  = pb ? free package sc ? 70/sot ? 323 (3 leads) drain gate 3 1 2 v (br)dss r ds(on) typ i d max 30 v 1.0  @ 4.0 v 1.5  @ 2.5 v 270 ma nts4001nt1g sc ? 70 (pb ? free) 3000 / tape & reel td m   source 3 1 2 3 gs d (note: microdot may be in either location) *date code orientation may vary depending upon manufacturing location. ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. NVS4001NT1G sc ? 70 (pb ? free) 3000 / tape & reel
nts4001n, nvs4001n http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise stated) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 100  a 30 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j 60 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 30 v 1.0  a gate ? to ? source leakage current i gss v ds = 0 v, v gs = 10 v 1.0  a on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 100  a 0.8 1.2 1.5 v gate threshold temperature coefficient v gs(th) /t j ? 3.4 mv/ c drain ? to ? source on resistance r ds(on) v gs = 4.0 v, i d = 10 ma 1.0 1.5  v gs = 2.5 v, i d = 10 ma 1.5 2.0 forward transconductance g fs v ds = 3.0 v, i d = 10 ma 80 ms charges and capacitances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 5.0 v 20 33 pf output capacitance c oss 19 32 reverse transfer capacitance c rss 7.25 12 total gate charge q g(tot) v gs = 5.0 v, v ds = 24 v, i d = 0.1 a 0.9 1.3 nc threshold gate charge q g(th) 0.2 gate ? to ? source charge q gs 0.3 gate ? to ? drain charge q gd 0.2 switching characteristics (note 3) turn ? on delay time td (on) v gs = 4.5 v, v dd = 5.0 v, i d = 10 ma, r g = 50  17 ns rise time tr 23 turn ? off delay time td (off) 94 fall time tf 82 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 10 ma t j = 25 c 0.65 0.7 v t j = 125 c 0.43 reverse recovery time t rr v gs = 0 v, di s /dt = 8.0 a/  s, i s = 10 ma 5.0 ns 2. pulse test: pulse width 300  s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures.
nts4001n, nvs4001n http://onsemi.com 3 typical performance curves (t j = 25 c unless otherwise noted) 0 0.2 0.1 1.2 0.4 v ds , drain ? to ? source voltage (volts) i d, drain current (amps) 0.06 0.02 0 figure 1. on ? region characteristics 1.2 2 1.6 2.2 0.1 0.06 0.02 1.4 0 1 figure 2. transfer characteristics v gs , gate ? to ? source voltage (volts) 0.5 0.25 figure 3. on ? resistance vs. drain current and temperature i d, drain current (amps) r ds(on), drain ? to ? source resistance (  ) i d, drain current (amps) figure 4. on ? resistance vs. drain current and gate voltage ? 50 0 ? 25 25 1.4 1.2 1 0.8 0 50 125 100 figure 5. on ? resistance variation with temperature t j , junction temperature ( c) t j = 25 c 1.25 t j = ? 55 c t j = 125 c 75 150 i d = 0.01 a v gs = 10 v r ds(on), drain ? to ? source resistance (normalized) 0.8 25 c 2 1.5 v 0.005 0.205 figure 6. drain ? to ? source leakage current vs. voltage 1.75 v 2 v 2.5 v 2 1.6 v ds = 5 v 0.75 v gs = 2.75 v v gs = 10 v to 3 v 0.04 0.08 0.12 0.08 0.04 1.8 t j = 125 c v gs = 10 v t j = ? 55 c t j = 25 c 1.0 1.8 1.6 030 v ds, drain ? to ? source voltage (volts) 10000 10 i dss , leakage (na) 1000 100 10 15 t j = 150 c t j = 125 c 5 v gs = 0 v 0.055 0.105 0.155 0.5 0.25 i d, drain current (amps) r ds(on), drain ? to ? source resistance (  ) 1.25 0.005 0.205 0.75 v gs = 10 v t j = 25 c 1.0 0.055 0.105 0.155 v gs = 4.5 v 0.6 0.4 0.2 20 25 0.18 0.16 0.14 2.25 v
nts4001n, nvs4001n http://onsemi.com 4 typical performance curves (t j = 25 c unless otherwise noted) v ds = 0 v v gs = 0 v 0 10 10 30 20 10 0 25 gate ? to ? source or drain ? to ? source voltage (volts) c, capacitance (pf) 0 0.2 4 1 0 q g , total gate charge (nc) v gs, gate ? to ? source voltage (volts) t j = 25 c c oss c iss c rss i d = 0.1 a t j = 25 c 50 0.6 2 3 q gd q gs 5 40 5 v gs v ds 15 0.4 1 0.65 0.02 0 v sd , source ? to ? drain voltage (volts) i s , source current (amps) v gs = 0 v t j = 25 c 0.7 0.75 0.1 figure 7. capacitance variation figure 8. gate ? to ? source voltage vs. total gate charge figure 9. diode forward voltage vs. current 5 0.8 q g 0.5 0.6 0.55 0.04 0.06 0.08 20 c rss c iss
nts4001n, nvs4001n http://onsemi.com 5 package dimensions sc ? 70 (sot ? 323) case 419 ? 04 issue n a a2 d e1 b e e a1 c l 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 0.05 (0.002) 1.9 0.075 0.65 0.025 0.65 0.025 0.9 0.035 0.7 0.028  mm inches  scale 10:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h e dim a min nom max min millimeters 0.80 0.90 1.00 0.032 inches a1 0.00 0.05 0.10 0.000 a2 0.70 ref b 0.30 0.35 0.40 0.012 c 0.10 0.18 0.25 0.004 d 1.80 2.10 2.20 0.071 e 1.15 1.24 1.35 0.045 e 1.20 1.30 1.40 0.047 0.035 0.040 0.002 0.004 0.014 0.016 0.007 0.010 0.083 0.087 0.049 0.053 0.051 0.055 nom max l 2.00 2.10 2.40 0.079 0.083 0.095 h e e1 0.65 bsc 0.38 0.028 ref 0.026 bsc 0.015 0.20 0.56 0.008 0.022 style 8: pin 1. gate 2. source 3. drain on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 nts4001n/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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